#
# Copyright (C) [2024] Xingyun Integrated Circuit, Inc.
#
# GreenCode was a private technology asset of Xingyun Integrated Circuit， Inc （Confidential）
# Author: Shawn.Tan
# Date: 2025.10.28
#
# History: Initial Version 2025.10.28
#
#
from gpgpu.EnvGPGPU import EnvGPGPU
from gpgpu.GenThreadGPGPU import GenThreadGPGPU
from base.Sequence import Sequence


# This test verifies instructions with implied base register operands
# can be generated without preamble.
class MainSequence(Sequence):
    def generate(self, **kargs):
        instructions = (
            "C.FLDSP##CALM",
            "C.FSDSP##CALM",
            "C.LDSP##CALM",
            "C.LWSP##CALM",
            "C.SDSP##CALM",
            "C.SWSP##CALM",
        )

        if self.getGlobalState("AppRegisterWidth") == 32:
            instructions = (
                "C.FLDSP##CALM",
                "C.FSDSP##CALM",
                "C.LWSP##CALM",
                "C.SWSP##CALM",
            )

        for _ in range(100):
            instr_id = self.genInstruction(self.choice(instructions), {"NoPreamble": 1})

            if instr_id:
                instr_record = self.queryInstructionRecord(instr_id)

                if instr_record["Addressing"]["Base"][0] != 2:
                    self.error(
                        "Unexpected base register; Expected=x2, Actual=x%d"
                        % instr_record["Addressing"]["Base"][0]
                    )


MainSequenceClass = MainSequence
GenThreadClass = GenThreadGPGPU
EnvClass = EnvGPGPU
